1. Field of the Invention
The present invention relates to a semiconductor circuit in which a semiconductor circuit unit is protected from a high voltage that can be generated at a signal input terminal for receiving a signal to be inputted to the semiconductor circuit unit.
2. Description of Related Art
As the voltage-current characteristic of a diode, when a voltage applied to the diode exceeds a predetermined threshold value, a current flows through the diode but does not flow in the reverse direction. Therefore, in a semiconductor circuit, a diode is disposed at the input part of a semiconductor circuit unit so as to protect the semiconductor circuit unit connected to the signal input terminal from a high voltage that can be generated at the signal input terminal.
FIG. 1 is a circuit diagram of a conventional semiconductor circuit. A signal input terminal 3 is connected, via a resistor 15, to the anode of a clamping diode 13, the cathode of a clamping diode 14 and the gates of a P-channel transistor 11 and an N-channel transistor 12. One terminal of the series circuit formed with the P-channel transistor 11 and the N-channel transistor 12 is connected to a power supply terminal 1 connected to a first power supply, and the other terminal thereof is connected to a ground power supply terminal 2 connected to a second power supply. The cathode of the clamping diode 13 is connected to a node between the power supply terminal 1 and the P-channel transistor 11, and the anode of the clamping diode 14 is connected to a node between the ground power supply terminal 2 and the N-channel transistor 12.
A node between the P-channel transistor 11 and the N-channel transistor 12 is connected to a signal output terminal 4. Thus, the resistor 15 and the clamping diodes 13 and 14 form an overvoltage protection circuit 20. The P-channel transistor 11 and the N-channel transistor 12 form a semiconductor circuit unit 21 serving as an interface.
The operation of such a semiconductor circuit will now be described. When a signal at a high level is inputted through the signal input terminal 3, the N-channel transistor 12 is turned on and the P-channel transistor 11 is turned off, thereby allowing the signal output terminal 4 to have the same voltage level as that of the ground power supply terminal 2. When a signal at a low level is inputted through the signal input terminal 3, the P-channel transistor 11 is turned on and the N-channel transistor 12 is turned off, thereby allowing the signal output terminal 4 to have the same voltage level as that of the power supply terminal 1. Then, the voltage at the signal output terminal 4 is supplied to another semiconductor circuit unit that is not shown.
In this semiconductor circuit, when a positive high voltage is generated at the signal input terminal 3, a current flows through the clamping diode 13 due to the high voltage, and the input voltage to the semiconductor circuit, unit 21 is clamped. Thus, the semiconductor circuit unit 21 is protected from the positive high voltage. Alternatively, when a negative high voltage is generated at the signal input terminal 3, a current flows through the clamping diode 14 due to the high voltage, and the input voltage to the semiconductor circuit unit 21 is clamped. Thus, the semiconductor circuit unit 21 is protected from the negative high voltage.
Such a conventional semiconductor circuit, however, has the following problem: when, for example, a positive high voltage generated at the signal input terminal 3 exceeds a voltage obtained by adding the supply voltage to the forward voltage of the clamping diode 13, the input current to the clamping diode 13 rapidly increases. As a result, an over-current flows from the signal input terminal 3 toward the power supply terminal 1. The overcurrent flows also toward the node between the P-channel transistor 11 and the power supply terminal 1, resulting in flowing into the semiconductor circuit unit 21.
The overcurrent flows through the semiconductor circuit unit 21 in this manner. When the overcurrent is excessive, the current is transmitted through a parasitic diode or a parasitic transistor in the semiconductor circuit unit 21, thereby allowing a large current to flow from the power supply terminal 1 through the P-channel transistor 11 and the N-channel transistor 12. As a result, what is called latch-up can be possibly caused in which the P-channel transistor 11 and the N-channel transistor 12 work abnormally or are damaged.